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integrated dc - to - dc converter data sheet ADUM5010 rev. a document feedback info rmation furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specificat ions subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2012C 2013 analog devices, inc. all rights reserved. technical support www.analog.com features iso power integrated, isolated dc - to - dc converter regulated 3.15 v to 5.25 v output up to 1 50 mw output power 20- lead s sop package with 5 .3 mm creepage high temperature operation: 105c high common - mode transient immunity: >25 kv/s safety and regu latory approvals ul recognition (pending) 2500 v rms for 1 minute per ul 1577 csa component acceptance notice #5a (pending) vde certificate of conformity (pending) din v vde v 0884 - 10 (vde v 0884 - 10):2006 - 12 v iorm = 560 v peak applications power supply st art - up bias and gate drives isolated sensor interfaces industrial plcs general description the ADUM5010 1 is an integrated, isolated dc - to - dc converter . based o n the analog devices, inc., i coupler? technology, the dc - to - dc converter provides regulated, isolated power, adjustable between 3.15 v and 5.25 v. input supply voltages can range from slightly below the required output to significantly higher. popular com bination s and their associated power levels are shown in table 1 . the i co upler chip - scale transformer technology is used for isolated logic signals and for the magnetic components of the dc - to - dc converter. the result is a small f orm factor, total isolation solution. iso power uses high frequency switching elements to transfer power through its transformer. special care must be taken during printed circuit board (pcb) layout to meet emissions standards. see the an - 0971 application note for board layout recommendations. functional block dia gram gnd p nc nc nc gnd p gnd p nc pdis v ddp gnd p nc gnd iso gnd iso gnd iso gnd iso nc nc nc v sel v iso 1.25v 1 2 3 4 5 6 7 8 9 10 16 15 14 13 12 19 20 18 17 1 1 ADUM5010 osc rect reg pcs 10978-001 figure 1 . table 1 . power levels input voltage (v) output voltage (v) output power (mw) 5 5 150 5 3.3 100 3.3 3.3 66 1 protected by u.s. patents 5,952,849; 6,873,065 ; 6,903,578 ; and 7 , 075 , 329 . other patents are pending.
ADUM5010 data sheet rev. a | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics 5 v primary input supp ly/5 v secondary isolated supply .......................................................... 3 electrical characteristics 3.3 v primary input supply/3.3 v secondary isolated supply .......................................................... 4 elect rical characteristics 5 v primary input supply/3.3 v secondary isolated supply .......................................................... 5 package characteristics ............................................................... 6 regulatory approvals ................................................................... 6 insulation and safety - related specifications ............................ 6 din v vde v 0884 - 10 (vde v 0884 - 10) insulation characteristics ...............................................................................7 recommended operating conditions .......................................7 absolute maximum ratings ............................................................8 esd caution ...................................................................................8 pin configuration and function descriptions ..............................9 tr ut h tabl e .....................................................................................9 typica l performance characteristics ........................................... 10 applications information .............................................................. 12 pcb layout ................................................................................. 12 thermal analysis ....................................................................... 13 emi considerations ................................................................... 13 insulation lifetime ..................................................................... 13 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 14 revision history 5/13 rev. 0 to rev. a changes to table 16 .......................................................................... 9 10/12 revision 0: initial version
data sheet ADUM5010 rev. a | page 3 of 16 specificat ions electrical character istics 5 v primary input supply /5 v secondary isolated s upply all typical specifications are at t a = 25c, v ddp = v iso = 5 v , v sel resistor network : r1 = 10 k , r2 = 3 0.9 k . minimum/maximum specifications apply over the entire rec ommended operation range which is 4.5 v v ddp , v sel , v iso 5.5 v , and ? 40c t a + 105c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels , unless otherwise noted. table 2 . dc -to - dc converter static specification s parameter symbol min typ max unit test conditions /comments dc - to - dc converter supply set point v iso 5.0 v i iso = 15 ma, r1 = 10 k , r2 = 3 0.9 k thermal coefficient v iso (tc) ? 44 v/c line regulation v is o (line) 20 mv/v i iso = 15 ma, v dd p = 4.5 v to 5.5 v load regulation v iso (load) 1.3 3 % i iso = 3 ma to 27 ma output ripple v iso (rip) 75 mv p -p 20 mhz bandwidth, c bo = 0.1 f ||10 f, i iso = 27 ma output noise v iso (n oise ) 200 mv p -p c bo = 0.1 f||10 f, i iso = 27 ma switching frequency f osc 125 mhz p ulse w idth modulation frequency f pwm 600 khz output supply i iso (max) 30 ma v iso > 4.5 v efficiency at i iso (max) 29 % i iso = 27 ma i ddp , no v iso load i dd1 (q) 6.8 12 ma i ddp , ful l v iso load i dd1 (max) 104 ma thermal shutdown shutdown temperature 154 c thermal hysteresis 10 c table 3 . input and output characteristics parameter symbol min typ max unit test conditions /comments dc spec ifications logic high input threshold v ih 0.7 v dd p v logic low input threshold v il 0.3 v dd p v undervoltage lockout v iso , v ddp s upply positive going threshold v uv+ 2.7 v negative going threshold v uv? 2.4 v input currents per channel i pdis ? 10 +0.01 +10 a 0 v v pdis v dd p
ADUM5010 data sheet rev. a | page 4 of 16 electrical character istics 3.3 v primary input supply /3.3 v secondary isolated s upply all typical specifications are at t a = 25c, v ddp = v iso = 3.3 v , v sel resistor net work : r1 = 10 k , r2 = 1 6.9 k . minimum/maximum specifications apply over the entire recommended operation range which is 3.0 v v ddp , v sel , v iso 3.6 v , and ? 40c t a + 105c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels , unless otherwise noted. table 4. dc -to - dc converter static specification s parameter symbol min typ max unit test conditions /comments dc - to - dc converter supply setpoint v iso 3.3 v i iso = 10 ma, r1 = 10 k , r2 = 1 6.9 k thermal coefficient v iso (tc) ? 26 v/c i iso = 20ma line regulation v iso (line) 20 mv/v i iso = 10 ma, v dd p = 3.0 v to 3.6 v load regulation v iso (load) 1.3 3 % i iso = 2 ma to 18 ma output ripple v iso (rip) 50 mv p -p 20 mhz bandw idth, c bo = 0.1 f||10 f, i iso = 18 ma output noise v iso (noise) 130 mv p -p c bo = 0.1 f||10 f, i iso = 18 ma switching frequency f osc 125 mhz pulse width modulation frequency f pwm 600 khz output supply i iso (max) 20 ma 3.6 v > v iso > 3 v efficiency at i iso (max) 27 % i iso = 18 ma i dd1 , no v iso load i dd1 (q) 3.3 10.5 ma i dd1 , full v iso load i dd1 (max) 77 ma thermal shutdown shutdown temperature 154 c thermal hysteresis 10 c table 5 . in put and output characteristics parameter symbol min typ max unit test conditions /comments dc specifications logic high input threshold v ih 0.7 v dd p v logic low input threshold v il 0.3 v dd p v undervoltage lockout v ddp s upply positive going threshold v uv+ 2.7 v negative going threshold v uv? 2.4 v input currents per channel i pdis ? 10 +0.01 +10 a 0 v v pdis v ddp
data sheet ADUM5010 rev. a | page 5 of 16 electrical character istics 5 v primary input supply /3.3 v secondary isolated s upply all typical specifications are at t a = 25c, v ddp = 5.0 v, v iso = 3.3 v , v sel resisto r network : r1 = 10 k , r2 = 1 6.9 k . minimum/maximum specifications apply over the entire recommended operation range which is 4.5 v v ddp 5.5 v , 3.0 v v iso 3.6 v , and ? 40c t a + 105c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels , unless otherwise noted. table 6. dc -to - dc converter static specification s parameter symbol min typ max unit test conditions /comments dc - to - dc converter supply setpoint v iso 3.3 v i iso = 15 ma, r1 = 10 k , r2 = 1 6.9 k thermal coefficient v iso (tc) ? 26 v/c line regulation v iso (line) 20 mv/v i iso = 15 ma, v dd1 = 4.5 v to 5.5 v load regulation v iso (load) 1.3 3 % i iso = 3 ma to 27 ma output ripple v iso (rip) 50 mv p -p 20 mhz bandwidth, c bo = 0.1 f||10 f, i iso = 27 ma output noise v iso (noise) 130 mv p -p c bo = 0.1 f||10 f, i iso = 27 ma switching frequency f osc 125 mhz p ulse width modulation frequency f pwm 600 khz output supply i iso (max) 30 ma 3.6 v > v iso > 3 v efficiency at i iso (max) 24 % i iso = 27 ma i dd1 , no v iso load i dd1 (q) 3.2 8 ma i dd1 , full v iso load i dd1 (max) 85 ma thermal shutdown shutdown temperature 154 c thermal hysteresis 10 c table 7. input and output characteristics parameter symbol min typ max unit test conditions /comments dc specifications logic high input threshold v ih 0.7 v dd p v logic low input threshold v il 0.3 v dd p v undervoltage lockout v iso , v ddp s upply positive going th reshold v uv+ 2.7 v negative going threshold v uv ? 2.4 v input currents per channel i pdis ? 10 +0.01 +10 a 0 v v pdis v ddp
ADUM5010 data sheet rev. a | page 6 of 16 package characterist ics table 8. thermal and isolation characteristics parameter symbol min typ max unit test conditions /comments resistance (inpu t to output) 1 r i- o 10 12 capacitance (input to output) 1 c i- o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction - to - ambient thermal resistance ja 50 c/w thermocouple located at center of package unde rside, test conducted on 4- layer board with thin traces 3 1 the device is consider ed a 2 - terminal device: pin 1 through pin 10 are shorted together; and pin 11 through pin 20 are shorted together . 2 input capacitance is from any input dat a pin to ground. 3 see the thermal analysis section for thermal model definitions. regulatory approvals table 9. ul (pending) 1 csa (pending) vde (pending) 2 recognized under 1577 component reco g nition program 1 approved u nder csa component acceptance notice #5a certified according to din v vde v 0884 -10 (vde v 0884 - 10):2006-12 2 single protection, 2500 v rms isolation voltage basic insulation per csa 60950-1-03 and iec 60950 - 1, 400 v rms ( 565 v peak) maximum working vol t age reinforced insulation, 560 v peak file e214100 file 205078 file 2471900 -4880-0001 1 in accordance with ul 1577, each ADUM5010 is proo f tested by applying an insulation test voltage 3 000 v rms for 1 second (current leakage det ection limit = 10 a). 2 in accordance with din v vde v 0884 - 10 , adu m5010 is proof tested by applying an insulation test voltage 1590 v peak for 1 second (partial discharge detection limit = 5 pc). the * marking branded on the component designates din v vde v 0884 - 1 0 approval. insulation and safet y - related specificatio ns table 10. critical safety - related dimensions and material properties parameter symbol value unit test conditions/comments rated dielectric insulation voltage 2500 v rms 1- minute duration minimum external air gap (clearance) l(i01) 5 .3 mm measured from input terminals to output terminals, shortest distance through air minimum external tracking (cre epage) l(i02) 5.3 mm measured from input terminals to output terminals, shortest distance path along body minimum internal gap (internal clearance) 0.022 min mm distance through insulation tracking resistance (comparative tracking index ) cti > 400 v din iec 112/vde 0303, part 1 isolation group i i material g roup (din vde 0110, 1/89, table 1)
data sheet ADUM5010 rev. a | page 7 of 16 din v vde v 0884 - 10 (vde v 0884- 10) insulation character istics these isolators are suitable for reinforced electrical isolation only within the safety limit da ta. maintenance of the safety data is ensured by the protective circuits. the asterisk (*) marking on packages denotes din v vde v 0884 - 10 approval. table 11. vde characteristics description test conditions /comments symbol character istic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii for rated mains voltage 400 v rms i to ii climatic classification 40/105/21 pollution degree per din vde 0110, table 1 2 maximum working insulati on voltage v iorm 560 v peak input - to- output test voltage, method b1 v iorm 1.875 = v pd(m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd(m) 1050 v peak input - to- output test voltage, method a after environmental tests subgr oup 1 v iorm 1.5 = v pd(m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc v pd(m) 840 v peak after input and/ or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd(m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc v pd(m) 672 v peak hi ghest allowable overvoltage v iotm 3535 v peak surge isolation voltage v iosm(test) = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 4000 v peak safety limiting values maximum value allowed in the event of a failure case temperature (see figure 2 ) t s 150 c safety total dissipated power i s1 2.5 w insulation resistance at t s v io = 500 v r s >109 0 0.5 1.0 1.5 2.0 2.5 3.0 0 50 100 150 200 ambient temperature (c) safe limiting power (w) 10978-002 figure 2 . thermal derating curve, dependence of safety limiting values on case temperature, per din v vde v 0884 - 10 recommended operatin g conditions table 12. parameter symbol min max unit opera ting temperature 1 t a ? 40 + 105 c supply voltages 2 v dd1 at v sel = 0 v v dd 3.0 5.5 v v dd1 at v sel = v iso 4.5 5.5 v 1 operation at 105c requires reduction of the maximum load current as specified in table 13. 2 each voltage is relative to its respective ground.
ADUM5010 data sheet rev. a | page 8 of 16 absolute maximum rat ings ambient temperature = 25c, unless otherwise noted. table 13. parameter rating storage temperature (t st ) ? 55c to +150c ambient operating temperature (t a ) ? 40c to +1 0 5c supply voltages (v ddp , v iso ) 1 ? 0.5 v to +7.0 v v iso supply current 2 t a = ?40c to +105c 30 ma input voltage ( pdis , v sel ) 1 , 3 ? 0.5 v to v dd + 0.5 v common - mode transients 4 ? 100 kv/s to +100 kv/s 1 all voltages are relative to their respective ground. 2 the v iso provides current for dc and dynamic loads on the v iso i/o channels. this current must be included when determining the total v iso supply current. 3 v dd can be either v ddp or v is o depending on the whether the input is on the primary or secondary side of the part respectively . 4 refers to c ommon - mode transients across the insulation barrier. common - mode transients exceed ing the absolute maximum ratings may cause latch - up or permanent damage. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or a ny other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 14. maximum continuo us working volt age supporting 50 - year minimum lifetime 1 parameter max unit applicable certification ac voltage bipolar waveform 560 v peak all certifications, 50- year operation unipolar waveform 560 v peak dc voltage |dc peak voltage | 560 v p eak 1 refers to the continuous voltage magnitude imposed across the isol a - tion barrier. see the insulation lifetime sect ion for more information. esd caution
data sheet ADUM5010 rev. a | page 9 of 16 pin configuration and function descrip tions 1 2 3 4 20 19 18 17 5 16 6 15 7 14 8 9 10 13 12 11 ADUM5010 top view (not to scale) gnd p nc nc nc gnd p gnd p nc pdis v ddp gnd p nc gnd iso gnd iso gnd iso gnd iso nc nc nc v sel v iso 10978-003 notes 1. pins labeled nc can be allowed to float, but it is better to connect these pins to ground. avoid routing high speed signals through these pins because noise coupling may result. figure 3 . pin configuration table 15 . pin function descriptions pin no. mnemonic description 1, 3, 4, 7, 14, 17, 18, 20 nc this pin is not connected internally (see figure 3). 2, 5, 6, 10 gn d p ground 1. ground reference for isolator primary. pin 2 and pin 10 are internally connected, and it is recommended that all pins be connected to a common ground. 8 p dis power disable . when this pin is tied to gnd p the power converter is active; when a l ogic high voltage is applied , the power supply enters a low power standby mode. 9 v ddp primary supply voltage, 3.0 v to 5.5 v . 11, 15, 16, 19 gnd iso ground reference for isolator side 2. pin 1 9 and pin 1 1 are internally connected, and it is recommended that all pins be connected to a common ground. 12 v iso secondary supply voltage output for external loads, 3. 15 v to 5.5 v depending on voltage d i vider connected to v sel . 13 v sel output voltage select input. a voltage d i vider attached to this pin between v iso and gnd iso determine s the v alue of v iso , see equation 1. truth table table 16 . truth table (positive logic) v ddp (v) v sel input pdis input v iso output (v) notes 5 r1 = 10 k , r2 = 30.9 k low 5 5 r1 = 10 k , r2 = 30.9 k high 0 3.3 r1 = 10 k , r2 = 16.9 k low 3.3 3.3 r1 = 10 k , r2 = 16.9 k high 0 5 r1 = 10 k , r2 = 16.9 k low 3.3 5 r1 = 10 k , r2 = 16.9 k high 0 3.3 r1 = 10 k , r2 = 30.9 k low 5 configurati on not recommended 3.3 r1 = 10 k , r2 = 30.9 k high 0
ADUM5010 data sheet rev. a | page 10 of 16 typical performance characteristics 0 5 10 15 20 25 30 35 0 0.020.040.060.08 load current (a) efficiency (%) 10978-004 v ddp = 5v/v iso = 3.3v v ddp = 3.3v/v iso = 3.3v v ddp = 5v/v iso = 5v figure 4. typical power supply efficiency at 5 v/5 v, 5 v/3.3 v, and 3.3 v/3.3 v 0 50 100 150 200 250 300 350 400 450 0 1 02 03 04 0 power dissip a tion (mw) i iso (ma) v ddp = 5v/v iso = 3.3v v ddp = 3.3v/v iso = 3.3v v ddp = 5v/v iso = 5v 10978-005 figure 5. typical total power dissipation vs. i iso 0 5 10 15 20 25 30 35 02 55 07 51 0 0 i iso (ma) i ddp (ma) v ddp = 5v/v iso = 3.3v v ddp = 3.3v/v iso = 3.3v v ddp = 5v/v iso = 5v 10978-006 figure 6. typical isolated output supply current, i iso , as a function of external load, at 5 v/5 v, 5 v/3.3 v, and 3.3 v/3.3 v 0 0.4 0.2 0.8 0.6 1.0 1.2 1.4 1.8 1.6 2.0 0 0.10 0.05 0.20 0.15 0.25 0.30 0.40 0.45 0.35 0.50 3.03.54.04.55.05.56.0 v ddp input voltage (v) power dissipation (w) i ddp current (a) 10978-007 power dissipation i ddp figure 7. typical short-circuit input current and power vs. v ddp supply voltage (1ms/div) v iso (100mv/div) 10% load 90% load 10978-008 figure 8. typical v iso transient load response, 5 v output, 10% to 90% load step (1ms/div) v iso (100mv/div) 10% load 90% load 10978-009 figure 9. typical transient load response, 3.3 v input, 3.3 v output, 10% to 90% load step
data sheet ADUM5010 rev. a | page 11 of 16 (1ms/div) v iso (100mv/div) 10978-010 figure 10. typical transient load response, 5 v input, 3.3 v output, 10% to 90% load step v iso (v) time (s) 4.970 4.965 4.960 4.955 4.950 4.945 4.940 1 0 234 10978-011 figure 11. typical v iso = 5 v output voltage ripple at 90% load v iso (v) time (s) 3.280 3.278 3.276 3.274 3.272 3.270 1 0 234 10978-012 figure 12. typical v iso = 3.3 v output voltage ripple at 90% load 2.0 2.5 3.0 3.5 4.0 4.5 5.0 3.03.54.04.55.05.56.0 minimum input vol t age (v) output voltage (v) 30ma load 20ma load 10ma load 10978-113 figure 13. relationship between output voltage and required input voltage, under load, to maintain >80% duty factor in the pwm 500 450 400 350 300 250 200 150 100 ?20 0 20 40 ambient temperature (c) power dissip a tion (mw) 60 80 100 120 ?40 v ddp = 5v/v iso = 5v v ddp = 5v/v iso = 3.3v 10978-114 figure 14. power dissipation with a 30 ma load vs. temperature 500 450 400 350 300 250 200 150 100 ?20 0 20 40 ambient temperature (c) power dissip a tion (mw) 60 80 100 120 ?40 10978-115 v ddp = 5v/v iso = 3.3v v ddp = 3.3v/v iso = 3.3v v ddp = 5v/v iso = 5v figure 15. power dissipation with a 20 ma load vs. temperature
ADUM5010 data sheet rev. a | page 12 of 16 applications informa tion the dc - to - dc converter section of the ADUM5010 works on principles that are common to most modern power supplies. it ha s split controller architecture with isolated pulse - width modulation (pwm) feed back. v ddp power is supplied to an oscillating circuit that switches current into a chip - scale air core transformer. power transferred to the secondary side is rectified and regulated to a value between 3.15 v and 5.25 v depending on the setpoint supplied b y an external voltage divider (s ee equation 1 ). the secondary (v iso ) side controll er regulates the output by creating a pwm control signal that is sent to the primary (v ddp ) side by a dedicated i coupler data channel. the pwm modulates the oscillator circuit to control the power being sent to the secondary side. feedback allows for sign ificantly higher power and efficiency. r1 r2 r1 v iso ) ( v 23 . 1 + = (1) w here: r1 is a resistor between v sel and gnd iso . r2 is a resistor between v sel and v iso . because the output voltage can be adjusted continuously there are an infinite number of operating c onditions. this data sheet addresses three discrete operating conditions in the specifications tables. many other combinations of input and output voltage are possible ; figure 13 depicts the supported voltage combinations at room temperature. figure 13 was generated by fixing the v iso load and decreasing the input voltage until the pwm was at 80% duty cycle. each of the curves represents the minimum input voltage that is requi red for operation under this criterion. for example , if the applica - tion requires 3 0 ma of output current at 5 v, the minimum input voltage at v ddp is 4.25 v . figure 13 also illustrates why the v ddp = 3.3 v input and v iso = 5 v con figuration is not recommended. even at 10 ma of output current, the pwm cannot maintain less than 80% duty factor , leaving no margin to support load or temperature variations . typically , the ADUM5010 dis sipates about 17% more power between room temperature and max imum temperature ; there - fore, the 20% pwm margin cover s temperature variations. the ADUM5010 implement s undervoltage lockout (uvlo) with hysteresi s on the primary and secondary sides i/o pins as well as the v ddp power input. this feature ensures that the converter does not go into oscillation due to noisy input power or slow power - on ramp rates. pcb layout the ADUM5010 digital isolator , with a 0.15 w iso power integrated dc - to - dc converter , require s no external interface circuitry for the logic interfaces. power supply bypass ing with a low esr capacitor is required as close to the chip pads as possibl e. the iso power inputs require several passive components to bypass the power effectively as well as to set the output voltage and to bypass the core voltage regulator (see figure 16 through figure 18). pdis v ddp gnd p 10 f 0.1 f + 8 9 10 10978-013 figure 16 . v ddp bias and bypass components v sel v iso gnd iso 10 f 0.1 f + 10k ? 30k ? 13 12 11 10978-014 figure 17 . v iso bias and bypass components the power supply section of the ADUM5010 uses a 125 mhz oscillator frequency to efficiently pass power through its chip - scale transformers. bypass capa citors must do more than one job and must be chosen carefully . noise suppression requires a low inductance, high frequency capacitor; ripple suppression and proper regula tion require a large value bulk capacitor. these capacitors are most conveniently connected between pin 9 and pin 10 for v ddp and between pin 11 and pin 12 for v iso . to suppress noise and reduce ripple, a parallel combination of at least two capacitors i s required. the recommended capacitor values are 0.1 f and 10 f for v dd1 . the smaller capacitor must have a low esr; for example, use of an npo or x5r ceramic capacitor is advised. ceramic capacitors are also recommended for the 10 mf bulk capacitance. an additional 10 nf capacitor can be added in parallel if further emi /emc control is desired . note that the total lead length between the ends of the low esr capacitor and the input power supply pin must not exceed 2 mm. gnd p gnd iso v se l pdis v dd p v iso gnd p by p ass < 2mm gnd iso ADUM5010 10978-015 figure 18 . recommended pcb layout in applications involving high common - mode transients, design the board layout such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this c an cause voltage differentials betw een pins, exceeding the absolute maximum ratings specified in table 13, and thereby leading to latch - up and/or permanent damage.
data sheet ADUM5010 rev. a | page 13 of 16 thermal analysis the ADUM5010 consist of two interna l die attached to a split lead frame with two die attach paddles. for the purposes of thermal analysis, the chip is treated as a thermal unit, with the highest junction temperature reflected in the ja from table 8 . the value of ja is based on measurements taken with the parts mounted on a jedec standard, 4 - layer board with fine width traces and still air. under normal operating conditions, the ADUM5010 can operate at full load a cross the full temperature range without derating the output current. power dissipation in the part varies with ambient temperature due to the characteristics of the switching and rectification elements. figure 14 and figure 15 show the relationship between total power dissipation at two load conditions and ambient temperature. this information can be used to determine the junction temperature at various operating conditions to ensure that the part do es not go into thermal shutdown unexpectedly. emi considerations the dc - to - dc converter section of the ADUM5010 components must, of necessity, operate at a very high frequency to allow efficient power transfe r through the small transformers. this creates high frequency currents that can propagate in circuit board ground and power planes, causing edge and dipole radiation. grounded enclosures are recommended for applications that use these devices. if grounde d enclosures are not possible, follow good rf design practices in the layout of the pcb. see the an - 0971 application note at www.analog.com for the most current pcb layout recommendations for the ADUM5010 . insulation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation is d ependent on the characteristics of the voltage waveform applied across the insulation. analog devices conducts an extensive set of evaluations to determine the lifetime of the insulation structure within the a dum5010 . accelerated life testing is performed using voltage levels higher than the rated continuous working voltage. acceleration factors for several operating conditions are determined, allowing calculation of the time to failure at the working voltage of interest. the values shown in table 14 summarize the peak voltages for 50 years of service life in several operating conditions. in many cases, the working voltage approved by agency testing is higher than the 50- year service l ife voltage. operation at working voltages higher than the service life voltage listed leads to premature insulation failure. the insulation lifetime of the ADUM5010 depends on the voltage w aveform type impos ed across the isolation barrier. the i coupler insulation structure degrades at different rates, depending on w hether the waveform is bipolar ac, unipolar ac, or dc. figure 19, figure 20, and figure 21 illustrate these different isolation voltage waveforms. bipolar ac voltage is the most stringent environment. a 50 - year operating lifetime under the bipolar ac condition determines the analog devices recommended maximum working voltage. in the case of unipolar ac or dc voltage, the stress on the insulation is s ignificantly lower. this allows operation at higher working voltages while still achieving a 50 - year service life. the working voltages listed in table 14 can be applied while maintaining the 50- year minimum lifetime, provided the voltage conforms to either the unipolar ac or dc voltage cases. any cross - insulation voltage waveform that does not conform to figure 20 or figure 21 must be treated as a bipolar ac waveform, and its p eak voltage must be li mited to the 50 - year lifetime voltage value listed in table 14. 0v rated peak voltage 10978-016 figure 19 . bipolar ac waveform 0v rated peak voltage 10978-017 figure 20 . dc waveform 0v rated peak voltage notes 1. the voltage is shown as sinu soidal for illustration puposes only. it is meant to represent any voltage waveform varying between 0v and some limiting value. the limiting value can be positive or negative, but the voltage cannot cross 0v. 10978-018 figure 21 . unipolar ac waveform
ADUM5010 data sheet rev. a | page 14 of 16 outline dimensions compliant t o jedec s t andards mo-150-ae 060106- a 20 1 1 10 1 7.50 7.20 6.90 8.20 7.80 7.40 5.60 5.30 5.00 sea ting plane 0.05 min 0.65 bsc 2.00 max 0.38 0.22 coplanarit y 0.10 1.85 1.75 1.65 0.25 0.09 0.95 0.75 0.55 8 4 0 figure 22 . 20- lead shrink small outline package [ssop] (rs - 20) dimensions shown in millimeters ordering guide model 1 , 2 temperature range package description package option adum 5010 arsz ? 40 c to +105 c 20- lead ssop rs - 20 ADUM5010 arsz - rl 7 ? 40 c to +105 c 20- lead ssop rs - 20 1 tape and reel are available. the addition of an rl suffix designates a 7 tape and reel option. 2 z = rohs compliant part.
data sheet ADUM5010 rev. a | page 15 of 16 notes
ADUM5010 data sheet rev. a | page 16 of 16 notes ? 2012 C 2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their r espective owners. d10978 - 0 - 5/13(a)

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